Systems engineering · Arcadia · Git-native
Your system architecture, as reviewable text.
ArcLang is MBSE as code: Arcadia models written in plain text, checked by a compiler that never lies, diffed by meaning, and gated like flight software.
requirements safety { req "REQ-AEB-001" "Obstacle detection" { description: "Detect obstacles at ≥ 150 m" safety_level: "ASIL-D" } } architecture logical { component "Sensor Fusion" { id: "LC-001" function "Fuse radar and camera" { latency: "25 ms" } } } trace "LC-001" satisfies "REQ-AEB-001" $ arclang gate model.arc --standard iso26262 ✓ GATE PASS — 5/5 requirements verified, timing budget 90 ms ≤ 100 ms, HARA consistent
01 / WHY TEXT
Diagrams you can't diff are architecture you can't review.
Graphical MBSE tools lock your architecture inside opaque databases: no pull requests, no blame, no CI. ArcLang moves the model into text — so 50 engineers can branch, review and merge a system the way they merge software — and keeps the diagrams, generated and always in sync.
Write.
Arcadia layers — operational, system, logical, physical, EPBS — in a strict language. Unknown constructs are localized errors, never silent skips:
error at line 42, column 7.Verify.
The compiler resolves every trace, port and allocation. Dangling references fail the build. The production gate checks requirements coverage, HARA/ASIL consistency and timing budgets against ISO 26262 / DO-178C.
Review.
arclang diffcompares versions by stable identity: moving a block is no change, renaming is a modification — a change list of meaning, not lines.Exchange.
Round-trip with Capella (byte-identical), requirements via ReqIF to DOORS and Polarion, architecture skeletons to Simulink and System Composer, FMI 2.0 co-simulation contracts.
02 / CAPABILITIES
Everything a systems team ships with — verified in CI, not promised.
A compiler that never lies
Strict parsing with source positions, deterministic element identity (UUIDv5 — same id, same UUID, everywhere, forever), and semantic analysis that treats a dangling trace as a build failure. If it compiles, the traceability graph is real.
# identity is frozen by golden-value tests LC-001 → 8006ab91-390c-5908-8464-b353219dfc1f # …and cross-checked against an independent # implementation, on every commit
Capella round-trip
Import native Capella models (184 elements matched on the reference project), edit as text, sync back by UUID — the XML comes back byte-identical when nothing changed.
Production gate
One command answers "can we release this design?": requirement satisfaction and verification, ASIL recomputed from S/E/C, timing budgets summed along functional chains, ICD completeness.
ReqIF exchange
OMG ReqIF import/export for the DOORS / Polarion loop, foreign identity preserved.
Simulink & FMI
System Composer architecture scripts and FMI 2.0 co-simulation contracts, GUIDs stable across re-exports.
SysML v2 export
OMG textual notation for interop with the wider MBSE ecosystem.
Multi-file models
import "subsystem.arc" — each team owns its fragment, the compiler assembles and cross-checks the whole. Circular imports and identity collisions are caught.
Semantic diff
Model review as a change list of identities. CI-gateable: exit 1 on unreviewed model change.
03 / TRUST
Built to be depended on for thirty years.
Aerospace and automotive programs outlive tools. ArcLang's governance is designed for that timescale.
Qualification-ready
A tool-qualification support kit ships in the repository: ISO 26262-8 §11 TCL analysis, DO-330 TQL determination, function/malfunction inventory, and an evidence matrix into the actual test suite.
Verifiable supply chain
MIT-licensed. RustSec dependency audit on every commit. Releases ship binaries with SHA256SUMS and GitHub build-provenance attestations.
Stability guaranteed
The language is semver'd, identity derivation is frozen by golden tests, and every output is deterministic: a diff always means a change, never noise.
04 / OFFER
Free where it spreads. Paid where it matters.
Open source — forever
The language, the compiler, the CLI, the gate and this playground. Attested releases, qualification support kit in the repo. No lock-in is the feature: your models are text files you own.
Team workspace
Hosted model review with visual semantic diff, gate dashboards per program, ReqIF exchange flows, SSO. Built for suppliers and design offices. Get early access →
Enterprise, air-gapped
On-premise deployment, long-term support, tool-qualification assistance (ISO 26262-8 / DO-330), Capella migration services and training. Talk to us →
AI-native by design
The playground ships an AI design assistant: describe your system, the model writes ArcLang, the compiler verifies it — the loop runs until the gate passes. And because ArcLang is text with a strict compiler, it's what makes AI-assisted systems engineering safe: the AI proposes, the compiler never lies. An MCP server ships in the repository for Claude and other assistants.
you> design a battery management system, ASIL-C ai> writing model… 4 components, 6 requirements ✓ compiled in 3 ms — GATE PASS (6/6 verified)
05 / TRY IT
The full compiler runs in your browser. Your model never leaves it.
The playground is the real ArcLang compiler — the same Rust core as the CLI — compiled to WebAssembly. Compilation, validation, the safety gate and the architecture explorer all execute client-side. Nothing is uploaded, ever. Paste a confidential model with a clear conscience.